committer filter by committer.
@path/to/ filter by path in repository.
committer@path/to/ filter by committer AND path in repository.
abdef0123 filter by commit's SHA hash.
rNNN filter by SVN revision.
rNNN-rMMM filter by SVN revisions range (inclusive).
Multiple filters can be specified separated by spaces or comas in which case they'll be combined using OR operator.
| c229f4aa | vishwin | May 2, 2021, 2:20 p.m. | Add myself (vishwin) as a ports committer
Following section 7.1 in Committer's Guide. Approved by: arrowd (mentor) Differential Revision: https://reviews.freebsd.org/D30078cgit |
|
| 2420f6ae | andrew | May 2, 2021, 7:43 a.m. | Enable IPIs on CPU 0 on arm and arm64
Not all interrupt controllers enable IPIs by default as the Arm GIC specs make it an implementation defined option. As at least two hypervisors have also previously masked the IPIs on boot. As we already enable these IPIs on the non-boot CPUs it is expected this is a safe operation. Differential Revision: https://reviews.freebsd.org/D26975cgit |
|
| fe382249 | andrew | May 2, 2021, 7:35 a.m. | Implement bus_map_resource on arm64
This will allow us to allocate an unmapped memory resource, then later map it with a specific memory attribute. This is also needed for virtio with the modern PCI attachment. Reviewed by: kib (via D29723) Sponsored by: Innovate UK Differential Revision: https://reviews.freebsd.org/D29694cgit |
|
| 50d31dbc | delphij | May 2, 2021, 6:16 a.m. | less: upgrade to v581.2.
MFC after: 1 weekcgit |
|
| bb457ab7 | delphij | May 2, 2021, 6:13 a.m. | Vendor import of less v581.2. | |
| be48fe60 | jhibbits | May 1, 2021, 9:18 p.m. | powerpc/xive: Remove POWER9 DD1 IRQ bits
The OPAL_XIVE_*_VIA_IFW flags are used only for POWER9 DD1, which we don't support. Noticed while perusing Linux and skiboot git logs.cgit |
|
| f1957db4 | andrew | May 1, 2021, 11:10 a.m. | Fix building sysctl(8) after c78ad20
In sysctl we parse an efi header on amd64. Fix this after changing the virtual memory type from a void * to a uint64_t in c78ad20.cgit |
|
| c78ad207 | andrew | May 1, 2021, 6:01 a.m. | Switch the EFI virtual address to a uint64_t
It is defined as a uint64_t in the UEFI spec. As it's not used as a pointer by the kernel follow this and define it as the same in the kernel. Reviewed by: kib, manu, imp Sponsored by: Innovate UK Differential Revision: https://reviews.freebsd.org/D29759cgit |
|
| 2abd4f85 | andrew | May 1, 2021, 6:01 a.m. | Add a way to map arm64 non-posted device memory
On arm64 we currently use a non-posted write for device memory, however we should move to use posted writes. This is expected to work on most hardware, however we will need to support a non-posted option for some broken hardware. Reviewed by: imp, manu, bcr (manpage) Differential Revision: https://reviews.freebsd.org/D29722cgit |
|
| a6ca7519 | jhibbits | May 1, 2021, 12:58 a.m. | powerpc64: Optimize radix trap handling a little more
Summary: Since PCPU can live in a GPR for a while longer, let it, rather than re-getting it in yet another register. MFSPR is an expensive operation, 12 clock latency on POWER9, so the fewer operations we need, the better. Since the check is tightly coupled to the fetch, by reducing the number of fetch+check, we reduce the stalls, and improve the performance marginally. Buildworld was measured at a ~5-7% improvement on a single run. Reviewed By: nwhitehorn Differential Revision: https://reviews.freebsd.org/D30003cgit |
|
| e245ee27 | mw | April 30, 2021, 10:58 p.m. | gicv3_its: Flush cache after allocating ITT memory
It has to be zeroed before committing it to device. We do that by allocating it with M_ZERO, but there was no memory barrier or cache flush to ensure its sees it zeroed. This fixes MSIX on LS1028A SoC. Submitted by: Kornel Duleba <mindal@semihalf.com> Reviewed by: andrew Obtained from: Semihalf Sponsored by: Alstom Group Differential Revision: https://reviews.freebsd.org/D30033cgit |
|
| 2f32a971 | vangyzen | April 30, 2021, 6:32 p.m. | Wait longer for a previous IPI to be sent
When sending an IPI, if a previous IPI is still pending delivery, native_lapic_ipi_vectored() waits for the previous IPI to be sent. We've seen a few inexplicable panics with the current timeout of 50 ms. Increase the timeout to 1 second and make it tunable. No hardware specification mentions a timeout in this case; I checked the Intel SDM, Intel MP spec, and Intel x2APIC spec. Linux and illumos wait forever. In Linux, see __default_send_IPI_shortcut() in arch/x86/kernel/apic/ipi.c. In illumos, see apic_send_ipi() in usr/src/uts/i86pc/io/pcplusmp/apic_common.c. However, misbehaving hardware could hang the system if we wait forever. Reviewed by: mav kib MFC after: 1 week Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D29942cgit |
|
| eda28feb | vangyzen | April 30, 2021, 5:53 p.m. | EFI secure boot VECTX related changes
When VECTX is enabled as a kernel option and non-EFI loaders are built, many reads will fail due to the mis-match of whether LOADER_VERIEXEC_VECTX or not in readin.h. Source that includes bootstrap.h must ensure the kernel option agrees with the compile time CFLAGS in the various make related files. Submitted by: bret_ketchum@dell.com (original revision) Reviewed by: sjg, bdrewery, dab, bret_ketchum@dell.com MFC after: 1 week Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D29993cgit |
|
| 619fe095 | kib | April 30, 2021, 2:43 p.m. | ioccom: define ioctl cmd value that can never be valid
Its use is for cases where some filler is needed for cmd, or we need an indication that there were no cmd supplied, and so on. Reviewed by: jhb Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D29935cgit |
|
| 07f229d2 | kib | April 30, 2021, 2:43 p.m. | connectat(2): clarify that the s argument is socket
Sponsored by: The FreeBSD Foundation MFC after: 3 dayscgit |