c1b76119 hselasky Feb. 1, 2022, 3:21 p.m.
MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
5381f936 hselasky Feb. 1, 2022, 3:21 p.m.
Because flowtables may redirect traffic to TIRs.

MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
001106f8 hselasky Feb. 1, 2022, 3:21 p.m.
Because it affects how the flow tables may re-direct traffic.

MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
2c0ade80 hselasky Feb. 1, 2022, 3:21 p.m.
This change adds convenience functions to setup a flow steering rule based on
a TCP socket. The helper function gets all the address information from the
socket and returns a steering rule, to be used with HW TLS RX offload.

MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
0ee1b09e hselasky Feb. 1, 2022, 3:21 p.m.
This namespace will be used for TCP offloads, like hardware decryption
of TLS TCP data.

MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
e059c120 hselasky Feb. 1, 2022, 3:21 p.m.
Previously flow steering tables and rules were only created and destroyed
at link up and down events, respectivly. Due to new requirements for adding
TLS RX flow tables and rules, the main flow steering table must always be
available as there are permanent redirections from the TLS RX flow table
to the vlan flow table.

MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
a8e715d2 hselasky Feb. 1, 2022, 3:21 p.m.
Add a refcount for posted WQEs to avoid a race between
post WQE and FW command flows.

MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
aabca103 hselasky Feb. 1, 2022, 3:21 p.m.
MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
06c2bd18 hselasky Feb. 1, 2022, 3:21 p.m.
All packets must go through the indirection table, RQT,
because it is not possible to modify the RQN of the TIR
for direct dispatchment after it is created, typically
when the link goes up and down.

MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
266c81aa hselasky Feb. 1, 2022, 3:21 p.m.
Add support to map an SQ to a specific schedule queue using a
special WQE as performance enhancement.

SQ remap operation is handled by a privileged internal queue, IQ,
and the mapping is enabled from one rate to another.

The transition from paced to non-paced should however always go
through FW.

MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
1c407d04 hselasky Feb. 1, 2022, 3:21 p.m.
MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
9680b1ba hselasky Feb. 1, 2022, 3:21 p.m.
MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
6176a5e3 hselasky Feb. 1, 2022, 3:21 p.m.
MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
69426357 hselasky Feb. 1, 2022, 3:21 p.m.
Internal send queues are regular sendqueues which are reserved for WQE commands
towards the hardware and firmware. These queues typically carry resync
information for ongoing TLS RX connections and when changing schedule queues
for rate limited connections.

The internal queue, IQ, code is more or less a stripped down copy
of the existing SQ managing code with exception of:

1) An optional single segment memory buffer which can be read or
   written as a whole by the hardware, may be provided.
2) An optional completion callback for all transmit operations, may
   be provided.
3) Does not support mbufs.

MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit
21228c67 hselasky Feb. 1, 2022, 3:21 p.m.
MFC after:	1 week
Sponsored by:	NVIDIA Networking
cgit