committer filter by committer.
@path/to/ filter by path in repository.
committer@path/to/ filter by committer AND path in repository.
NNN or rNNN filter by revision.
NNN-MMM or rNNN-rMMM filter by revisions range (inclusive).
Multiple filters can be specified separated by spaces or comas in which case they'll be combined using OR operator.
|r356702||glebius||Jan. 13, 2020, 9:12 p.m.||Fix yet another regression from r354484. Error code from cr_cansee()
aliases with hard error from other operations. Reported by: floViewVC
|r356701||dim||Jan. 13, 2020, 8:31 p.m.||Merge commit f46ba4f07 from llvm git (by Simon Atanasyan):
[mips] Use less registers to load address of TargetExternalSymbol There is no pattern matched `add hi, (MipsLo texternalsym)`. As a result, loading an address of 32-bit symbol requires two registers and one more additional instruction: ``` addiu $1, $zero, %lo(foo) lui $2, %hi(foo) addu $25, $2, $1 ``` This patch adds the missed pattern and enables generation more effective set of instructions: ``` lui $1, %hi(foo) addiu $25, $1, %lo(foo) ``` Differential Revision: https://reviews.llvm.org/D66771 llvm-svn: 370196 Merge commit 59bb3609f from llvm git (by Simon Atanasyan): [mips] Fix 64-bit address loading in case of applying 32-bit mask to the result If result of 64-bit address loading combines with 32-bit mask, LLVM tries to optimize the code and remove "redundant" loading of upper 32-bits of the address. It leads to incorrect code on MIPS64 targets. MIPS backend creates the following chain of commands to load 64-bit address in the `MipsTargetLowering::getAddrNonPICSym64` method: ``` (add (shl (add (shl (add %highest(sym), %higher(sym)), 16), %hi(sym)), 16), %lo(%sym)) ``` If the mask presents, LLVM decides to optimize the chain of commands. It really does not make sense to load upper 32-bits because the 0x0fffffff mask anyway clears them. After removing redundant commands we get this chain: ``` (add (shl (%hi(sym), 16), %lo(%sym)) ``` There is no patterns matched `(MipsHi (i64 symbol))`. Due a bug in `SYM_32` predicate definition, backend incorrectly selects a pattern for a 32-bit symbols and uses the `lui` instruction for loading `%hi(sym)`. As a result we get incorrect set of instructions with unnecessary 16-bit left shifting: ``` lui at,0x0 R_MIPS_HI16 foo dsll at,at,0x10 daddiu at,at,0 R_MIPS_LO16 foo ``` This patch resolves two problems: - Fix `SYM_32/SYM_64` predicates to prevent selection of patterns dedicated to 32-bit symbols in case of using N64 ABI. - Add missed patterns for 64-bit symbols for `%hi/%lo`. Fix PR42736. Differential Revision: https://reviews.llvm.org/D66228 llvm-svn: 370268 These two commits fix a miscompilation of the kernel for mips64, and should allow clang to be used as the default compiler for mips64. Requested by: arichards MFC after: 3 daysViewVC
|r356700||tsoome||Jan. 13, 2020, 8:02 p.m.||Backout 356693. The libsa malloc does provide necessary alignment and
memalign by 4 will reduce alignment for some platforms. Thanks for Ian for pointing this out.ViewVC
|r356695||markj||Jan. 13, 2020, 6:29 p.m.||Optimize diff -q.|
|r356694||kevans||Jan. 13, 2020, 6:26 p.m.||tap(4): also note that we drop configured addresses
This provides a specific pointer for users of tap(4) to understand why their interfaces are losing their addresses, and specifically how to workaround this if they need different behavior. This manpage received a .Dd bump earlier today in r35688, so no bump occurs this time. Submitted by: email@example.com (via IRC)ViewVC
|r356693||tsoome||Jan. 13, 2020, 6:22 p.m.||loader: allocate properly aligned buffer for network packet
Use memalign(4, size) to ensure we have properly aligned buffer. MFC after: 2 weeksViewVC
|r356688||kevans||Jan. 13, 2020, 5:02 p.m.||Install tap(4) manpage as vmnet(4) as well
If one comes across a vmnet interface, this is a useful pointer to have towards what it actually is if they're otherwise unfamiliar. MFC after: 3 daysViewVC
|r356687||kp||Jan. 13, 2020, 4:52 p.m.||gprof: Enable riscv
Add a missing riscv.h header file, and fix the check for riscv (must test MACHINE_CPUARCH, not MACHINE_ARCH, if we want to use 'riscv'). Sponsored by: AxiadoViewVC
|r356686||gjb||Jan. 13, 2020, 4:31 p.m.||Fix a typo.|
|r356685||gjb||Jan. 13, 2020, 4:31 p.m.||Ensure the TYPE, BRANCH, and REVISION variables are set in|
|r356684||emaste||Jan. 13, 2020, 2:50 p.m.||src.conf.5: regen after r356615, KERBEROS_SUPPORT dep on KERBEROS|
|r356683||mjg||Jan. 13, 2020, 2:33 p.m.||ufs: relax an overzealous assert added in r356671
Part of i_flag can persist across a drop to hold count of 0, at which point the vnode is taken off the lazy list. Then whoever locks and unlocks the vnode can trip on the assert. This trips over kyua running a test untarring character devices to ufs. Reported by: lwhsuViewVC
|r356682||kib||Jan. 13, 2020, 2:30 p.m.||Code must not unlock a mutex while owning the thread lock.|
|r356678||cy||Jan. 13, 2020, 6:55 a.m.||Sync with r356645. desiredvnodes is now maxvnodes.|
|r356677||cy||Jan. 13, 2020, 6:55 a.m.||As of r356642 desiredvnodes is u_long.|